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HGTG20N120C3D
Data Sheet October 1998 File Number
4508.1
45A, 1200V, UFS Series N-Channel IGBT with Anti-Parallel Hyperfast Diode
The HGTG20N120C3D is a MOS gated high voltage switching device combining the best features of MOSFETs and bipolar transistors. This device has the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: AC and DC motor controls, power supplies and drivers for solenoids, relays and contactors. The diode used in anti-parallel with the IGBT was formerly developmental type TA49155. The IGBT diode combination was formerly developmental type TA49264.
Features
* 45A, 1200V, TC = 25oC * 1200V Switching SOA Capability * Typical Fall Time. . . . . . . . . . . . . . . . 300ns at TJ = 150oC * Short Circuit Rating * Low Conduction Loss
Symbol
C
G
E
Ordering Information
PART NUMBER HGTG20N120C3D PACKAGE TO-247 BRAND 20N120C3D
Packaging
JEDEC STYLE TO-247
E
NOTE: When ordering, use the entire part number.
C G
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,466,176 4,587,713 4,620,211 4,641,162 4,694,313 4,794,432 4,809,047 4,860,080 4,901,127 4,969,027 4,417,385 4,516,143 4,598,461 4,631,564 4,644,637 4,717,679 4,801,986 4,810,665 4,883,767 4,904,609 4,430,792 4,532,534 4,605,948 4,639,754 4,682,195 4,743,952 4,803,533 4,823,176 4,888,627 4,933,740 4,443,931 4,567,641 4,618,872 4,639,762 4,684,413 4,783,690 4,809,045 4,837,606 4,890,143 4,963,951
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HGTG20N120C3D
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified HGTG20N120C3D 1200 45 20 160 20 30 20A at 1200V 208 1.67 100 -40 to 150 260 8 15 UNITS V A A A V V W W/oC mJ oC oC s s
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IC110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . SSOA Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Voltage Avalanche Energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EARV Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Short Circuit Withstand Time (Note 2) at VGE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . tSC Short Circuit Withstand Time (Note 2) at VGE = 12V. . . . . . . . . . . . . . . . . . . . . . . . . . tSC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Pulse width limited by maximum junction temperature. 2. VCE(PK) = 720V, TJ = 125oC, RGE = 3.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVCES ICES TEST CONDITIONS IC = 250A, VGE = 0V VCE = BVCES TC = 25oC TC = 150oC MIN 1200 5.0 VCE (PK) = 960V VCE (PK) = 1200V 60 20 TYP 2.4 2.2 7.0 MAX 150 2.0 3.0 2.9 7.5 250 UNITS V A mA V V V nA A A
Collector to Emitter Breakdown Voltage Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
VCE(SAT)
IC = IC110, VGE = 15V
TC = 25oC TC = 150oC
Gate to Emitter Threshold Voltage Gate to Emitter Leakage Current Switching SOA
VGE(TH) IGES SSOA
IC = 250A, VCE = VGE VGE = 20V TJ = 150oC, RG = 3, VGE = 15V L = 100H,
Gate to Emitter Plateau Voltage On-State Gate Charge
VGEP QG(ON)
IC = IC110, VCE = 0.5 BVCES IC = IC110, VCE = 0.5 BVCES VGE = 15V VGE = 20V
-
9.4 93 186 39 22 110 95 950 2250 1200
130 230 2400
V nC nC ns ns ns ns J J J
Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 4) Turn-On Energy (Note 4) Turn-Off Energy (Note 3)
td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF
IGBT and Diode at TJ = 25oC ICE = IC110 VCE = 0.8 BVCES VGE = 15V RG = 3 L = 1mH Test Circuit - (Figure 19)
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HGTG20N120C3D
Electrical Specifications
PARAMETER Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 4) Turn-On Energy (Note 4) Turn-Off Energy (Note 3) Diode Forward Voltage Diode Reverse Recovery Time TC = 25oC, Unless Otherwise Specified (Continued) SYMBOL td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF VEC trr IEC = 20A IEC = 1A, dIEC/dt = 200A/s IEC = 20A, dIEC/dt = 200A/s Thermal Resistance Junction To Case NOTES: 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. 4. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Figure 19. RJC IGBT Diode TEST CONDITIONS IGBT and Diode at TJ = 150oC ICE = IC110 VCE = 0.8 BVCES VGE = 15V RG = 3 L = 1mH Test Circuit - (Figure 19) MIN TYP 39 20 360 300 950 3365 4400 2.6 MAX 550 400 8000 3.4 50 70 0.6 1.25 UNITS ns ns ns ns J J J V ns ns
oC/W oC/W
Typical Performance Curves
45 ICE , DC COLLECTOR CURRENT (A) 40 35 30 25 20 15 10 5 0 25 50 75 100
(Unless Otherwise Specified)
ICE, COLLECTOR TO EMITTER CURRENT (A)
VGE = 15V
70 60 50 40 30 20 10 0
TJ = 150oC, RG = 3, VGE = 15V, L = 100H
125
150
0
200
400
600
800
1000
1200
1400
TC , CASE TEMPERATURE (oC)
VCE , COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
3
HGTG20N120C3D Typical Performance Curves
60 fMAX, OPERATING FREQUENCY (kHz)
(Unless Otherwise Specified) (Continued)
tSC , SHORT CIRCUIT WITHSTAND TIME (s)
TC 75oC 75oC 110oC 110oC
VGE 15V 12V 15V 12V
VCE = 720V, RGE = 3, TJ = 125oC
ISC 350 300 250 200 150 tSC 100 16
30 25 20 15 10 5 11
10
fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON2 + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) ROJC = 0.6oC/W, SEE NOTES 1 5 10 20 60 ICE, COLLECTOR TO EMITTER CURRENT (A)
12
13
14
15
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
ICE, COLLECTOR TO EMITTER CURRENT (A)
70 DUTY CYCLE <0.5%, VGE = 12V 60 PULSE DURATION = 250s 50 40 30 20 10 0 0 2 4 6 8 10 VCE, COLLECTOR TO EMITTER VOLTAGE (V) TC = 150oC TC = 25oC TC = -40oC
ICE, COLLECTOR TO EMITTER CURRENT (A)
200 175 150 125 100 75 50 25 0 0 2 4 6 8 10 DUTY CYCLE <0.5%, VGE = 15V PULSE DURATION = 250s
TC = -40oC
TC = 150oC TC = 25oC
12
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
20.0 17.5 15.0 12.5 10.0 7.5 5.0 2.5 0 5 10 15 20 TJ = 25oC, TJ = 150oC, VGE = 15V 25 30 35 40 45 TJ = 25oC, TJ = 150oC, VGE = 12V EOFF, TURN-OFF ENERGY LOSS (mJ) EON2 , TURN-ON ENERGY LOSS (mJ) RG = 3, L = 1mH, VCE = 960V
12 RG = 3, L = 1mH, VCE = 960V 10 8 6 4 2 0 5 10 ICE , COLLECTOR TO EMITTER CURRENT (A) 35 40 15 20 25 30 ICE , COLLECTOR TO EMITTER CURRENT (A) 45 TJ = 150oC, VGE = 12V OR 15V
TJ = 25oC, VGE = 12V OR 15V
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
4
ISC , PEAK SHORT CIRCUIT CURRENT (A) 14
TJ = 150oC, RG = 3, L = 1mH, V CE = 960V
35
400
HGTG20N120C3D Typical Performance Curves
55 RG = 3, L = 1mH, VCE = 960V tdI , TURN-ON DELAY TIME (ns) 50 trI , RISE TIME (ns) TJ = 25oC, TJ = 150oC, VGE = 12V 250 TJ = 25oC, TJ = 150oC, VGE = 12V 200 150 100 50 TJ = 25oC, TJ = 150oC, VGE = 15V 30 0 5 10 15 20 25 30 35 40 45 ICE , COLLECTOR TO EMITTER CURRENT (A) 5 10 15 20 25 30 35 40 45 TJ = 25oC, TJ = 150oC, VGE = 15V
(Unless Otherwise Specified) (Continued)
300
RG = 3, L = 1mH, VCE = 960V
45
40
35
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT
td(OFF)I , TURN-OFF DELAY TIME (ns)
450 400
RG = 3, L = 1mH, VCE = 960V
350 RG = 3, L = 1mH, VCE = 960V 300 tfI , FALL TIME (ns) TJ = 150oC, VGE = 12V AND 15V 250 200 150 100
350 300 250 200 150 100 50 TJ = 150oC, VGE = 12V, VGE = 15V TJ = 25oC, VGE = 12V, VGE = 15V
TJ = 25oC, VGE = 12V AND 15V 50 5 10 15 20 25 30 35 40 ICE , COLLECTOR TO EMITTER CURRENT (A) 45 5 10 15 20 25 30 35 40 45
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT
15
ICE, COLLECTOR TO EMITTER CURRENT (A)
175 150 125 100 75 50
DUTY CYCLE <0.5%, VCE = 10V PULSE DURATION = 250s
VGE , GATE TO EMITTER VOLTAGE (V)
IG (REF) = 1mA, RL = 30, TC = 25oC
12 VCE = 1200V 9 VCE = 400V 6 VCE = 800V
TC = 25oC
TC = 150oC 25 0 7 8 9 10 11 12 13 14 15 VGE , GATE TO EMITTER VOLTAGE (V) TC = -40oC
3
0 0 25 50 75 100 125 150 175 QG , GATE CHARGE (nC)
FIGURE 13. TRANSFER CHARACTERISTIC
FIGURE 14. GATE CHARGE WAVEFORMS
5
HGTG20N120C3D Typical Performance Curves
(Unless Otherwise Specified) (Continued)
8000 C, CAPACITANCE (pF) 7000 6000 5000 4000 3000 2000 1000 0 0 5 10 15 20 25 VCE, COLLECTOR TO EMITTER VOLTAGE (V) COES CRES FREQUENCY = 1MHz CIES
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE
ZJC , NORMALIZED THERMAL RESPONSE
100 0.50 0.20 0.10 10-1 0.05 0.02 0.01 10-2 10-5 DUTY FACTOR, D = t1 / t2 SINGLE PULSE 10-4 10-3 PEAK TJ = (PD X ZJC X RJC) + TC 10-2 10-1 100 PD t2 101
t1
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 16. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
70 100 IF, FORWARD CURRENT (A) 60 t, RECOVERY TIMES (ns) 50
TC = 150oC
150oC 10
25oC
trr 40 ta 30 20 10 tb
1
0
1
2
3
4
5
1
2
5 IF , FORWARD CURRENT (A)
10
20
VF, FORWARD VOLTAGE (V)
FIGURE 17. DIODE FORWARD CURRENT vs FORWARD VOLTAGE DROP
FIGURE 18. RECOVERY TIMES vs FORWARD CURRENT
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HGTG20N120C3D Test Circuit and Waveforms
HGTG20N120C3D 90% VGE L = 1mH VCE RG = 3 + VDD = 960V ICE 90% 10% td(OFF)I tfI trI td(ON)I EOFF 10% EON2
FIGURE 19. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 20. SWITCHING TEST WAVEFORMS
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler's body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as "ECCOSORBDTM LD26" or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate opencircuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2 ; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 20. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM. td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 20. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0).
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ECCOSORBD is a Trademark of Emerson and Cumming, Inc.
HGTG20N120C3D TO-247
3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE
E A OS Q OR D TERM. 4 OP
INCHES SYMBOL A b b1 b2 c D MIN 0.180 0.046 0.060 0.095 0.020 0.800 0.605 MAX 0.190 0.051 0.070 0.105 0.026 0.820 0.625
MILLIMETERS MIN 4.58 1.17 1.53 2.42 0.51 20.32 15.37 MAX 4.82 1.29 1.77 2.66 0.66 20.82 15.87 NOTES 2, 3 1, 2 1, 2 1, 2, 3 4 4 5 1 -
L1 L
b1 b2 c b
1 2 3 J1 3 2 1
E e e1 J1 L L1 OP Q OR OS
0.219 TYP 0.438 BSC 0.090 0.620 0.145 0.138 0.210 0.195 0.260 0.105 0.640 0.155 0.144 0.220 0.205 0.270
5.56 TYP 11.12 BSC 2.29 15.75 3.69 3.51 5.34 4.96 6.61 2.66 16.25 3.93 3.65 5.58 5.20 6.85
e e1
BACK VIEW
NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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